24C04 Card used for water gas electricity purchase card
24C04 Card Overview
24C04 chip card is a 4096 -bit serial EEPROM with an internal organization of 512 bytes and 8 bits per byte. The chip card is widely used in the industrial and commercial fields of low voltage and low power consumption.
Card Spec.
|
Product name |
Standard(Common) |
Optionals for custom |
|
Material |
PVC |
PET,ABS,PETG,etc |
|
Size |
85.5mm(L)×54mm(W) |
As Demand |
|
Thickness |
0.84mm |
0.5mm,0.6mm,0.8mm,0.84mm,etc |
|
Work temp. |
-20℃~+70℃ |
Different material,different temp. |
|
Protocol |
ISO7816 |
/ |
|
Chip type |
FM24c04 |
FM24c02,FM24c06,fm24c08,fm24c16,fm24c64,... |
|
Card color |
White PVC |
Red pvc,yellow pvc,blue pvc,transparent PVC,etc |
|
Printing |
Blank or printing |
CMYK Printing,Silkscreen printing,indigo printing,UV printing ,etc |
|
Crafts |
... |
Id hole,laser evgraving,uv code,stractch,signature pannel,emboss,gold/silver foiled,hologram ,watemark,... |
|
Package |
200pcs/box,2000pcs/ctn |
100/400/500pcs per box,1000/2000/3000/5000 pcs/ctn |
Key feather
- Working voltage: 2.2V~5.5V
- Internal structure: 512 × 8 (4K)
-Two-wire serial interface
- Input pin is filtered by Schmitt trigger to suppress noise
- Two-way data transfer protocol
- Compatible with 100KHz (2.2V) and 400KHz (5V) operation
- Support hardware write protection
- Supports 8-byte (02), 16-byte (04, 08, 08A, 16) page write mode
- Support partial page writing
- Write cycle internal timing (less than 5ms)
-g high reliability
- Package type
PDIP8 ,SOP8,TSSOP8,Module package(8Pin),Module package（6 Pin）
Limit rating
|
Operating temperature |
-55℃~+125℃ |
|
Storage temperature |
-65℃~+150℃ |
|
Voltage to ground of any pin |
-1.0V ~ +7.0 V |
|
Maximum operating voltage |
6.25V |
|
DC output current |
5.0mA |
Pin definition
|
Pin Name |
Pin Function |
|
A0-A2 |
Device address input |
|
SDA |
Serial data input and output |
|
SCL |
Serial clock input |
|
WP |
Write protection |
|
VCC |
Power supply |
|
GND |
Ground |
|
NC |
Un-connected |
- Write protection function description
|
Write protection pin status |
The portion of the memory that is write protected |
|
|
|
|
|
|
FM24C02 |
FM24C04 |
FM24C08 |
FM24C08A |
FM24C16 |
|
WP=Vcc |
Full address（2K） |
Full address（4K） |
Normal read and write |
Full address（8K） |
High half area（8K） |
五. Memory structure
FM24C02, 2K Serial Electrically Erasable Memory: Internally divided into 32 pages, 8 bytes per page, addressed by 8-bit address.
六. Read and write operations
Write operation
Byte write: After inputting the device address and getting the EEPROM response, an 8-bit data address is required for the write operation; after the EEPROM receives the data address and returns the response signal again, the clock will send the first 8 bits of data into the EEPROM; After the 8-bit data, the EEPROM returns an acknowledge signal and the master device ends the write operation upon receipt of the stop command. At this time, the EEPROM enters the internal timing write cycle (write time of the nonvolatile register), twR. All input operations are inactive during this write cycle and the EEPROM will only acknowledge the operation command after the end of the write cycle.
Page write: 2K devices can achieve 8-byte page writes, while 4K, 8K and 16K devices can achieve 16-byte page writes.
The page write operation is basically the same as the byte write operation. The difference is that after the clock feeds the first set of data and gets the EEPROM response, the master device does not issue a stop command, but continues to send the remaining seven groups (2K) or fifteen groups (4K, 8K, 16K) of data, each A response signal is returned when a set of data EEPROMs is received. The master device must end the page write operation with a stop command.
Read operation
The read operation is basically the same as the write operation except that the read/write bit in the device address is set to "1". There are three types of read operations: current address read, free read, and continuous read.
Current address read:The internal data address counter retains the address of the last access and is automatically incremented by one. This address is always active during operation of the device as long as the chip is powered. In a read operation, if reading begins from the last byte of the last page of memory, the address will be flipped to the minimum address of the entire EEPROM when the byte is read: in the write operation, if the last word from the current page When the section starts writing, the address will be flipped to the smallest address in the same page when one byte is written.
Once the clock feeds the device address with the read/write bit "1" and the EEPROM responds, the current address data is serially output. The master device does not return an acknowledge signal to the EEPROM, but instead generates an immediate stop command.
Free reading:Free reading requires a fake byte write operation to get the data address. Once the device address and data address bytes are clocked in and acknowledged by the EEPROM, the master must generate another start command. The primary empty device initiates a current address read by sending a read/write select bit to the high device address. The EEPROM serially outputs data by responding to the device address. The master device does not return an acknowledge signal to the data transfer, but instead generates a immediately following stop command.
Continuous reading:Continuous reading is initiated by a day address read or free read. The master device receives a set of data responses when it returns a reply signal. Each time the EEPROM receives an acknowledge, the data address is automatically incremented by one and the next set of data is serially output. When the 2K, 8K, 16K device reaches the maximum address of the memory, the data address will be flipped to the minimum address and the continuous read operation will continue. The master device does not issue an acknowledge signal, but instead generates a follow-up stop command to end the continuous read operation.
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